From 47482ef46cd299de14a3d8f10b641696c0cd938a Mon Sep 17 00:00:00 2001 From: DualFroz Date: Sun, 23 Aug 2026 20:28:49 +0200 Subject: [PATCH] feat(cpu): add CB-prefixed opcode handling --- src/GameBoy.Core/Cpu/Cpu.Cb.cs | 72 ++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 src/GameBoy.Core/Cpu/Cpu.Cb.cs diff --git a/src/GameBoy.Core/Cpu/Cpu.Cb.cs b/src/GameBoy.Core/Cpu/Cpu.Cb.cs new file mode 100644 index 0000000..6cadd73 --- /dev/null +++ b/src/GameBoy.Core/Cpu/Cpu.Cb.cs @@ -0,0 +1,72 @@ +namespace GameBoy.Cpu +{ + public sealed partial class Cpu + { + private byte GetOperand(int index) + { + return index switch + { + 0 => B, + 1 => C, + 2 => D, + 3 => E, + 4 => H, + 5 => L, + 6 => Read8(HL), + _ => A + }; + } + + private void SetOperand(int index, byte value) + { + switch (index) + { + case 0: B = value; break; + case 1: C = value; break; + case 2: D = value; break; + case 3: E = value; break; + case 4: H = value; break; + case 5: L = value; break; + case 6: Write8(HL, value); break; + default: A = value; break; + } + } + + private void ExecuteCb() + { + byte op = Fetch8(); + int index = op & 0x07; + int y = (op >> 3) & 0x07; + int block = op >> 6; + + byte value = GetOperand(index); + + switch (block) + { + case 0: + byte rotated = y switch + { + 0 => Rlc(value), + 1 => Rrc(value), + 2 => Rl(value), + 3 => Rr(value), + 4 => Sla(value), + 5 => Sra(value), + 6 => Swap(value), + _ => Srl(value) + }; + SetOperand(index, rotated); + break; + case 1: + BitTest(y, value); + break; + case 2: + SetOperand(index, ResetBit(y, value)); + break; + default: + SetOperand(index, SetBit(y, value)); + break; + } + } + } +}